blob: f71e27a04645ad425c4d8e819a17a78bd2760d42 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
|
#include <stdio.h>
#include <string.h>
#include <stdlib.h>
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "driver/gpio.h"
#include "schrank_ant_pcb.h" //contains setting of board revision
#ifndef ESP32_BOARD_REV_B
void io_init(void)
{
#define GPO_BIT_MASK (1ULL << PHY_PWR)
gpio_config_t o_conf;
o_conf.intr_type = GPIO_INTR_DISABLE;
o_conf.mode = GPIO_MODE_OUTPUT;
o_conf.pin_bit_mask = GPO_BIT_MASK;
o_conf.pull_down_en = GPIO_PULLDOWN_ENABLE;
o_conf.pull_up_en = GPIO_PULLUP_DISABLE;
gpio_config(&o_conf);
gpio_set_level((gpio_num_t) PHY_PWR, 1);
// inputs
/*
#define GPI_BIT_MASK ((1ULL << SWITCH)|(1ULL << SWITCH))
gpio_config_t i_conf;
i_conf.intr_type = GPIO_INTR_DISABLE;
i_conf.mode = GPIO_MODE_INPUT;
i_conf.pin_bit_mask = GPI_BIT_MASK;
i_conf.pull_down_en = GPIO_PULLDOWN_DISABLE;
i_conf.pull_up_en = GPIO_PULLUP_DISABLE;
gpio_config(&i_conf);
*/
}
#endif
|
