diff options
| author | Drahflow <drahflow@gmx.de> | 2015-04-11 01:24:38 +0200 |
|---|---|---|
| committer | Drahflow <drahflow@gmx.de> | 2015-04-11 01:24:38 +0200 |
| commit | 3f97bff6aca06eaeb6999b094f2ba241de31fc0e (patch) | |
| tree | 63150b0ab7a4a2ac331951e0a82109c4eef11a94 | |
| parent | 3e22eb797f02cdb54a5eccc8c6ebce33e1e1d7d5 (diff) | |
Correctly handle negative indices during optimization
| -rw-r--r-- | elymas/lib/sys/opt.ey | 14 |
1 files changed, 10 insertions, 4 deletions
diff --git a/elymas/lib/sys/opt.ey b/elymas/lib/sys/opt.ey index df3d210..4b46de4 100644 --- a/elymas/lib/sys/opt.ey +++ b/elymas/lib/sys/opt.ey @@ -891,8 +891,11 @@ /rsi /ecx :movlMemReg 3 /rcx :shrqImm8Reg /rcx :decqReg - /rdx /rdx :xorqRegReg # FIXME: Is this correct? - /rcx :divqReg + :cqo + /rcx :idivqReg + 0 /rdx :cmpqImm8Reg + [ /rcx /rdx :addqRegReg ] len :jgeRel8 + /rcx /rdx :addqRegReg 8 8 /rdx /rsi :pushqMemIndexScaleDisp8 ] emitOpcodes } @@ -905,8 +908,11 @@ [ 8 /rax /rax :movqMemDisp8Reg ] len :jcRel8 8 /rax /rax :movqMemDisp8Reg 16 /rsi /rcx :movqMemDisp8Reg - /rdx /rdx :xorqRegReg - /rcx :divqReg # FIXME: Is this correct? + :cqo + /rcx :idivqReg + 0 /rdx :cmpqImm8Reg + [ /rcx /rdx :addqRegReg ] len :jgeRel8 + /rcx /rdx :addqRegReg 24 1 /rdx /rsi /rbx :movzxMem8IndexScaleDisp8Reg64 63 /rbx :btsqImm8Reg /rbx :pushqReg |