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authorDrahflow <drahflow@gmx.de>2013-10-23 03:09:15 +0200
committerDrahflow <drahflow@gmx.de>2013-10-23 03:09:15 +0200
commit247959af5f74e33445f201a97324995a99872cd8 (patch)
tree8f28e015da02fdc3b024e3f92c1a5bdf86ce8c83
parent3815a054b5a1871e00337fb29460ae2bfbb6dfc6 (diff)
Further optimizations
-rw-r--r--compiler/elymasGlobalStr.ey6
-rw-r--r--elymas/lib/sys/opt.ey43
2 files changed, 43 insertions, 6 deletions
diff --git a/compiler/elymasGlobalStr.ey b/compiler/elymasGlobalStr.ey
index 6143b23..4c32da4 100644
--- a/compiler/elymasGlobalStr.ey
+++ b/compiler/elymasGlobalStr.ey
@@ -109,8 +109,6 @@
/rax :pushqReg
:cld
- /rcx /rcx :testqRegReg
-
24 1 /rsi /rdx /rsi :leaqMemIndexScaleDisp8Reg
24 /rax /rdi :leaqMemDisp8Reg
:reprcx :movsb
@@ -162,8 +160,6 @@
/rax :pushqReg
:cld
- /rcx /rcx :testqRegReg
-
24 1 /rsi /rdx /rsi :leaqMemIndexScaleDisp8Reg
24 /rax /rdi :leaqMemDisp8Reg
:reprcx :movsb
@@ -216,8 +212,6 @@
/rax :pushqReg
:cld
- /rcx /rcx :testqRegReg
-
24 1 /rsi /rdx /rsi :leaqMemIndexScaleDisp8Reg
24 /rax /rdi :leaqMemDisp8Reg
:reprcx :movsb
diff --git a/elymas/lib/sys/opt.ey b/elymas/lib/sys/opt.ey
index df315f7..7e90457 100644
--- a/elymas/lib/sys/opt.ey
+++ b/elymas/lib/sys/opt.ey
@@ -279,6 +279,49 @@
{ thirdLast holdsInt }' andif
{
[
+ { 1 last * |add ::rawAddress eq
+ { 0 secondLast * PUSH streq }' andif
+ { 1 secondLast * 128 lt }' andif
+ }' {
+ 1 secondLast * ==value
+ [ NATIVE [
+ /rdx :popqReg
+ 63 /rdx :btrqImm8Reg
+ [ 8 /rdx /rdx :movqMemDisp8Reg ] len :jcRel8
+ 8 /rdx /rdx :movqMemDisp8Reg
+
+ value /rdx :addqImm8Reg
+
+ /rdx /rax :movqRegReg
+ 32 /rax :shrqImm8Reg
+
+ [
+ 63 /rdx :btsqImm8Reg
+ /rdx :pushqReg
+ 0 :jmpRel8
+ ] len :jnzRel8
+
+ 63 /rdx :btsqImm8Reg
+ /rdx :pushqReg
+
+ [
+ /rdx :pushqReg
+ ::internalAllocateInteger /rax :movqImmReg
+ /rax :callqReg
+ 8 /rax :popqMemDisp8
+ /rax :pushqReg
+ ] len :jmpRel8
+
+ /rdx :pushqReg
+ ::internalAllocateInteger /rax :movqImmReg
+ /rax :callqReg
+ 8 /rax :popqMemDisp8
+ /rax :pushqReg
+ ] ] i logic =[]
+ [ NOP ] i 1 sub logic =[]
+ [ NOP ] i 2 sub logic =[]
+ }
+
{ 1 last * |add ::rawAddress eq }' {
[ NATIVE [
/rcx :popqReg