aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorDrahflow <drahflow@gmx.de>2015-06-21 15:53:26 +0200
committerDrahflow <drahflow@gmx.de>2015-06-21 15:53:26 +0200
commit1b17194834943b1b1584d16a0eb8283febe150f3 (patch)
treefa6bb344b3f019182867a90503d434daa34da5e3
parentaa3bb00f946ecdb89008c07760098089b09f8bca (diff)
Uniformly use rax as indirect jump register
-rw-r--r--TODO4
-rw-r--r--compiler/elymasGlobal.ey4
-rw-r--r--elymas/lib/sys/opt.ey8
3 files changed, 8 insertions, 8 deletions
diff --git a/TODO b/TODO
index 2422d95..9e64e29 100644
--- a/TODO
+++ b/TODO
@@ -1,10 +1,10 @@
-* rewrite [ ... ] conds when everything is inline
* apply the trace extractor to non-tail situations
* forward scope-cannot-escape information
* inline trivial functions when optimizer generates ... /rax :movqImmReg /rax :callqReg sequence
* parse }" created constant pushers into PUSH in optimizer
* hunt the }"s down
-* RAWCONSTCONDSTHISSCOPE could also work with PUSH
+* don't allocate ints for syscalls if not necessary
+* *THISSCOPE could also work with PUSH
* utf8
* regex substitution
* asm-based regex engine
diff --git a/compiler/elymasGlobal.ey b/compiler/elymasGlobal.ey
index 0a48385..77fcb0e 100644
--- a/compiler/elymasGlobal.ey
+++ b/compiler/elymasGlobal.ey
@@ -1468,12 +1468,12 @@
/rcx /rdi :movqRegMem
8 /rdi :addqImm8Reg
[
- /rdi :movqImmOOBReg
+ /rax :movqImmOOBReg
] ::loadToRdi
/rbx /rdi :movqRegMem
8 /rdi :addqImm8Reg
[
- /rdi :callqReg
+ /rax :callqReg
/r15 /r14 :movqMemReg
diff --git a/elymas/lib/sys/opt.ey b/elymas/lib/sys/opt.ey
index ef5cdd4..b7b8a1c 100644
--- a/elymas/lib/sys/opt.ey
+++ b/elymas/lib/sys/opt.ey
@@ -73,8 +73,8 @@
8 /r15 :popqMemDisp8
/r14 /r15 :movqRegMem
0 /r14 :movqImmReg
- 0 /rdi :movqImmReg
- /rdi :callqReg
+ 0 /rax :movqImmReg
+ /rax :callqReg
/r15 /r14 :movqMemReg
8 /r15 :pushqMemDisp8
16 /r15 :addqImm8Reg
@@ -2423,8 +2423,8 @@
/r14 /r15 :movqRegMem
2 entry /r14 :movqImmReg
- 1 entry /rdi :movqImmReg
- /rdi :callqReg
+ 1 entry /rax :movqImmReg
+ /rax :callqReg
/r15 /r14 :movqMemReg
8 /r15 :addqImm8Reg